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PD - 97273
IRF6712SPbF IRF6712STRPBF
RoHS Compliant Containing No Lead and Bromide l Low Profile (<0.7 mm) l Dual Sided Cooling Compatible l Ultra Low Package Inductance l Optimized for High Frequency Switching l Ideal for CPU Core DC-DC Converters l Optimized for both Sync.FET and some Control FET application l Low Conduction and Switching Losses l Compatible with existing Surface Mount Techniques l 100% Rg tested
l
Typical values (unless otherwise specified)
DirectFET Power MOSFET
RDS(on) RDS(on)
VDSS
VGS
25V max 20V max 3.8m@ 10V 6.7m@ 4.5V
Qg
tot
Qgd
4.4nC
Qgs2
1.7nC
Qrr
14nC
Qoss
10nC
Vgs(th)
1.9V
13nC
SQ
MT MP
DirectFET ISOMETRIC
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details) SQ SX ST MQ MX
Description
The IRF6712SPbF combines the latest HEXFET(R) Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. The IRF6712SPbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors operating at higher frequencies. The IRF6712SPbF has been optimized for parameters that are critical in synchronous buck operating from 12 volt bus converters including Rds(on) and gate charge to minimize losses.
Absolute Maximum Ratings
Parameter
VDS VGS ID @ TA = 25C ID @ TA = 70C ID @ TC = 25C IDM EAS IAR
12
Typical RDS(on) (m)
Max.
Units
V
Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Single Pulse Avalanche Energy Avalanche CurrentAg
g
e e f
h
VGS, Gate-to-Source Voltage (V)
25 20 17 13 68 130 13 13
6.0 5.0 4.0 3.0 2.0 1.0 0.0 0 2 4 6 8 10 12 14 ID= 13A VDS= 20V VDS= 13V
A
mJ A
10 8 6 4 2 0 2 3 4 5 6 7 8 T J = 25C T J = 125C
ID = 17A
9 10 11 12 13 14 15 16
16
VGS, Gate -to -Source Voltage (V)
Notes: Click on this section to link to the appropriate technical paper. Click on this section to link to the DirectFET Website. Surface mounted on 1 in. square Cu board, steady state.
Fig 1. Typical On-Resistance Vs. Gate Voltage
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
TC measured with thermocouple mounted to top (Drain) of part. Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25C, L = 0.14mH, RG = 25, IAS = 13A.
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02/19/07
IRF6712SPbF
Static @ TJ = 25C (unless otherwise specified)
Parameter
BVDSS VDSS/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss RG td(on) tr td(off) tf Ciss Coss Crss Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min.
25 --- --- --- 1.4 --- --- --- --- --- 40 --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. Max. Units
--- 18 3.8 6.7 1.9 -6.1 --- --- --- --- --- 13 3.1 1.7 4.4 3.8 6.1 10 1.7 12 57 13 6.2 1570 490 210 --- --- 4.9 8.7 2.4 --- 1.0 150 100 -100 --- 20 --- --- --- --- --- --- 3.0 --- --- --- --- --- --- --- pF VGS = 0V VDS = 13V = 1.0MHz ns nC
Conditions
VGS = 0V, ID = 250A
V
mV/C Reference to 25C, ID = 1mA m VGS = 10V, ID = 17A i VGS = 4.5V, ID = 13A i V mV/C A nA S VDS = 25V, VGS = 0V VDS = 25V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VDS = 13V, ID = 13A VDS = 13V nC VGS = 4.5V ID = 13A See Fig. 15 VDS = 16V, VGS = 0V VDD = 13V, VGS = 4.5V i ID = 13A Clamped Inductive Load VDS = VGS, ID = 50A
Diode Characteristics
Parameter
IS ISM VSD trr Qrr Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) g Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge --- --- --- --- --- 0.81 17 14 2.7 1.0 26 21 V ns nC
Min.
---
Typ. Max. Units
--- 17 A
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 13A, VGS = 0V i TJ = 25C, IF = 13A di/dt = 200A/s i
Notes:
Pulse width 400s; duty cycle 2%.
2
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IRF6712SPbF
Absolute Maximum Ratings
PD @TA = 25C PD @TA = 70C PD @TC = 25C TP TJ TSTG Power Dissipation Power Dissipation Power Dissipation Peak Soldering Temperature Operating Junction and Storage Temperature Range
e e f
Parameter
Max.
2.2 1.4 36 270 -40 to + 150
Units
W
C
Thermal Resistance
RJA RJA RJA RJC RJ-PCB Junction-to-Ambient Junction-to-Ambient Junction-to-Ambient Junction-to-Case Junction-to-PCB Mounted Linear Derating Factor
el jl kl fl
Parameter
Typ.
--- 12.5 20 --- 1.0 0.017
Max.
58 --- --- 3.5 ---
Units
C/W
eA
W/C
100 D = 0.50
Thermal Response ( Z thJA )
10
0.20 0.10 0.05 0.02 0.01
J R1 R1 J 1 2 R2 R2 R3 R3 3 R4 R4 4 R5 R5 A 1 2 3 4 5 5 A
1
Ri (C/W)
1.61955 2.14056 22.2887 20.0457 11.9144
i (sec)
0.000126 0.001354 0.375850 7.41 99
0.1
Ci= i/Ri Ci= i/Ri
0.01
SINGLE PULSE ( THERMAL RESPONSE )
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthja + Tc 0.001 0.01 0.1 1 10 100 1000
0.001 1E-006
1E-005
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Used double sided cooling , mounting pad with large heatsink. Mounted on minimum footprint full size board with metalized
back and with small clip heatsink. Notes:
R is measured at TJ of approximately 90C.
Surface mounted on 1 in. square Cu (still air).
Mounted to a PCB with small clip heatsink (still air)
Mounted on minimum footprint full size board with metalized back and with small clip heatsink (still air)
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IRF6712SPbF
1000 60s PULSE WIDTH Tj = 25C
1000
TOP VGS 10V 5.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.5V
60s PULSE WIDTH
Tj = 150C
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
100
BOTTOM
10
BOTTOM
VGS 10V 5.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.5V
1
10
0.1
2.5V
2.5V
0.01 0.1 1 10 100 VDS, Drain-to-Source Voltage (V)
1 0.1 1 10 100 V DS, Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
1000 VDS = 15V 60s PULSE WIDTH 100 T J = 150C 10 T J = 25C T J = -40C
Fig 5. Typical Output Characteristics
2.0 ID = 17A
Typical RDS(on) (Normalized)
ID, Drain-to-Source Current (A)
1.5
V GS = 10V V GS = 4.5V
1.0
1
0.1 1 2 3 4 5
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160
VGS, Gate-to-Source Voltage (V)
T J , Junction Temperature (C)
Fig 6. Typical Transfer Characteristics
10000
VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd
Fig 7. Normalized On-Resistance vs. Temperature
25 T J = 25C 20
Typical RDS(on) ( m)
C, Capacitance(pF)
Ciss 1000 Coss
Vgs = 4.0V Vgs = 4.5V Vgs = 5.0V Vgs = 10V
15
10
Crss
5
100 1 10 VDS, Drain-to-Source Voltage (V) 100
0 0 50 100 150
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
Fig 9. Typical On-Resistance Vs. Drain Current and Gate Voltage
ID, Drain Current (A)
4
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IRF6712SPbF
1000 VGS = 0V 100
ID, Drain-to-Source Current (A)
1000 OPERATION IN THIS AREA LIMITED BY R DS(on) 100sec
ISD, Reverse Drain Current (A)
100
10 T J = 150C T J = 25C T J = -40C
10
10msec 1msec
1
1
T A = 25C
T J = 150C 0.1
Single Pulse
0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VSD, Source-to-Drain Voltage (V)
0.10
1.00
10.00
100.00
VDS, Drain-to-Source Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
18 16 14
ID, Drain Current (A)
3.0
Typical VGS(th) Gate threshold Voltage (V)
Fig11. Maximum Safe Operating Area
2.5
12 10 8 6 4 2 0 25 50 75 100 125 150 T C , Case Temperature (C)
2.0 ID = 50A 1.5 ID = 100A
ID = 250A ID = 1.0A
ID = 1.0mA 1.0 -75 -50 -25 0 25 50 75 100 125 150 T J , Temperature ( C )
Fig 12. Maximum Drain Current vs. Case Temperature
60
EAS , Single Pulse Avalanche Energy (mJ)
Fig 13. Typical Threshold Voltage vs. Junction Temperature
ID 3.8A 5.4A BOTTOM 13A TOP
50 40 30 20 10 0 25 50 75
100
125
150
Starting T J , Junction Temperature (C)
Fig 14. Maximum Avalanche Energy vs. Drain Current
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IRF6712SPbF
Id Vds Vgs
L
0
DUT
20K 1K
S
VCC
Vgs(th)
Qgodr
Qgd
Qgs2 Qgs1
Fig 15a. Gate Charge Test Circuit
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
tp
DRIVER
VDS
L
VGS RG
D.U.T
IAS
+ V - DD
A
20V
tp
0.01
I AS
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test Circuit
LD VDS
VGS
90%
+
VDD -
D.U.T VGS
Second Pulse Width < 1s Duty Factor < 0.1%
10%
VDS
td(off) tf td(on) tr
Fig 17a. Switching Time Test Circuit
Fig 17b. Switching Time Waveforms
6
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IRF6712SPbF
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
*
* * * *
dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
**
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* Use P-Channel Driver for P-Channel Measurements ** Reverse Polarity for P-Channel
*** VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for HEXFET(R) Power MOSFETs
DirectFET Substrate and PCB Layout, SQ Outline (Small Size Can, Q-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.
G = GATE D = DRAIN S = SOURCE
D G D S
D
D
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IRF6712SPbF
DirectFET Outline Dimension, SQ Outline (Small Size Can, Q-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.
DIMENSIONS
METRIC MAX CODE MIN 4.85 A 4.75 3.95 B 3.70 2.85 C 2.75 0.45 D 0.35 0.52 E 0.48 0.52 F 0.48 0.92 G 0.88 0.82 H 0.78 N/A J N/A 0.97 K 0.93 2.10 L 2.00 M 0.616 0.676 R 0.020 0.080 0.17 P 0.08 IMPERIAL MIN 0.187 0.146 0.108 0.014 0.019 0.019 0.035 0.031 N/A 0.037 0.079 0.0235 0.0008 0.003 MAX 0.191 0.156 0.112 0.018 0.020 0.020 0.036 0.032 N/A 0.038 0.083 0.0274 0.0031 0.007
DirectFET Part Marking
Line above the last character of the date code indicates "Lead-Free"
8
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IRF6712SPbF
DirectFET Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF6712TRPBF). For 1000 parts on 7" reel, order IRF6712TR1PBF STANDARD OPTION METRIC CODE MIN MAX A 330.0 N.C B 20.2 N.C C 12.8 13.2 D 1.5 N.C E 100.0 N.C F N.C 18.4 G 12.4 14.4 H 11.9 15.4 REEL DIMENSIONS (QTY 4800) TR1 OPTION (QTY 1000) IMPERIAL IMPERIAL METRIC MIN MIN MAX MAX MIN MAX 12.992 6.9 N.C N.C 177.77 N.C 0.795 0.75 N.C 19.06 N.C N.C 0.504 0.53 0.50 13.5 0.520 12.8 0.059 0.059 N.C 1.5 N.C N.C 3.937 2.31 N.C 58.72 N.C N.C N.C N.C 0.53 N.C 0.724 13.50 0.488 0.47 N.C 11.9 0.567 12.01 0.469 0.47 11.9 0.606 N.C 12.01
Loaded Tape Feed Direction
NOTE: CONTROLLING DIMENSIONS IN MM
CODE A B C D E F G H
DIMENSIONS IMPERIAL METRIC MIN MAX MIN MAX 0.311 0.319 7.90 8.10 0.154 0.161 3.90 4.10 0.469 0.484 11.90 12.30 0.215 0.219 5.45 5.55 0.158 0.165 4.00 4.20 0.197 0.205 5.00 5.20 0.059 N.C 1.50 N.C 0.059 0.063 1.50 1.60
Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.02/07
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